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ACS709
High Bandwidth, Fast Fault Response Current Sensor IC
In Thermally Enhanced Package
Functional Block Diagram
VCC
D
CLK
Q
FAULT_EN
VOC
Hall
Bias
POR
POR
FAULT Reset
–
+
2V REF
R
Control
Drain
FAULT
Fault
Comparator
–
Logic
3 mA
VZCR
IP+
Sensitivity
Trim
+
IP–
Hall
Amplifier
Signal
Recovery
GND
R F(INT)
FILTER
V OUT(Q)
Trim
VIOUT
Terminal List Table
Number
1 through 6
Name
IP+
Description
Sensed current copper conduction path pins. Terminals for current being sensed;
fused internally, loop to IP– pins; unidirectional or bidirectional current flow.
Pin-out Diagram
7 through 12
IP–
Sensed current copper conduction path pins. Terminals for current being sensed;
fused internally, loop to IP+ pins; unidirectional or bidirectional current flow.
IP+ 1
IP+ 2
IP+ 3
IP+ 4
IP+ 5
IP+ 6
IP– 7
IP– 8
IP– 9
IP– 10
IP– 11
IP– 12
24 NC
23 NC
22 FAULT_EN
21 VOC
20 VCC
19 FAULT
18 VIOUT
17 FILTER
16 VZCR
15 GND
14 NC
13 NC
13, 14, 23, 24
15
16
17
18
19
20
21
NC
GND
VZCR
FILTER
VIOUT
ˉFˉ ˉA ˉUˉˉLˉ ˉTˉ
VCC
VOC
No connection
Device ground connection.
Voltage Reference Output pin. Zero current (0 A) reference; output voltage on this
pin scales with V CC .
Filter pin. Terminal for an external capacitor connected from this pin to GND to set
the device bandwidth.
Analog Output pin. Output voltage on this pin is proportional to current flowing
through the loop between the IP+ pins and IP– pins.
Overcurrent Fault pin. When current flowing between IP+ pins and IP– pins
exceeds the overcurrent fault threshold, this pin transitions to a logic low state.
Supply voltage.
Overcurrent Input pin. Analog input voltage on this pin sets the overcurrent fault
threshold.
22
FAULT_EN Enables overcurrent faulting when high. Resets ˉFˉ ˉA ˉUˉˉLˉ ˉTˉ when low.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
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